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Reliability of Oxide Thin Film Transistors under the Gate Bias Stress with 400 nm Wavelength Light Illumination

2011 MRS Spring Meeting.

Soo-Yeon Leea1, Sun-Jae Kima1, Yongwook Leea1a2, Woo-Geun Leea2, Kap-Soo Yoona2, Jang-Yeon Kwona3 and Min-Koo Hana1

a1 School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Republic of Korea

a2 Samsung Electronics, Yongin-Si, Republic of Korea

a3 Department of Materials Science and Engineering, Seoul National University, Seoul, Republic of Korea

ABSTRACT

We have investigated the reliability of the inverted-staggered etch stopper structure oxide-based TFTs under negative gate bias stress combined with 400 nm wavelength light illumination and the relationship between the carrier concentration at the channel and the extent of Vth shift. It was found that the photo-induced holes cause the severe Vth degradation at the beginning of stress and the hole trapping rate of a single hole is not altered with the increase of the hole concentration. In oxide-based TFTs, the hole concentration at the channel is the determinant factor of the reliability.

Key Words:

  • thin film;
  • display;
  • elastic properties
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